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civilinfrastructureplatform:ciptesting:cipreferencehardware [2022/07/12 08:03] nobuhiro.iwamatsu Update QEMU status |
civilinfrastructureplatform:ciptesting:cipreferencehardware [2022/10/11 13:17] patersonc Added proposed risc-v support |
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| Cyclone V DE0-Nano-SoC Development Kit | Armv7 | N | N | Y | Y<sup>1</sup> | Y | T | | | Cyclone V DE0-Nano-SoC Development Kit | Armv7 | N | N | Y | Y<sup>1</sup> | Y | T | | ||
| QEMU | x86_64 | Y | Y<sup>1</sup> | Y | Y<sup>1</sup> | Y | T | | | QEMU | x86_64 | Y | Y<sup>1</sup> | Y | Y<sup>1</sup> | Y | T | | ||
- | | ::: | Armv7(virt/cortex-a15) | Y | Y | Y | Y | Y | T | | + | | ::: | Armv7(virt/cortex-a15) | Y | Y<sup>1</sup> | Y | Y<sup>1</sup> | Y | T | |
- | | ::: | Armv8(virt/cortex-a53) | Y | Y | Y | Y | Y | T | | + | | ::: | Armv8(virt/cortex-a53) | Y | Y<sup>1</sup> | Y | Y<sup>1</sup> | Y | T | |
| [[civilinfrastructureplatform:ciptesting:cipreferencehardware:iwg20m|RZ/G1M iWave Qseven Development Kit]] | Armv7 | Y | Y<sup>2</sup> | Y | Y<sup>2</sup> | Y | Y | | | [[civilinfrastructureplatform:ciptesting:cipreferencehardware:iwg20m|RZ/G1M iWave Qseven Development Kit]] | Armv7 | Y | Y<sup>2</sup> | Y | Y<sup>2</sup> | Y | Y | | ||
| [[civilinfrastructureplatform:ciptesting:cipreferencehardware:hihope-rzg2m|RZ/G2M HopeRun HiHope]] | Armv8 | N | N | Y | Y<sup>2</sup> | Y | Y | | | [[civilinfrastructureplatform:ciptesting:cipreferencehardware:hihope-rzg2m|RZ/G2M HopeRun HiHope]] | Armv8 | N | N | Y | Y<sup>2</sup> | Y | Y | | ||
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<sup>2</sup> Tested with Real-Time enabled Kernel configuration | <sup>2</sup> Tested with Real-Time enabled Kernel configuration | ||
+ | ===== Candidate Reference Hardware ===== | ||
+ | The following platforms have been submitted to the CIP TSC for consideration to become an official CIP reference platform: | ||
+ | | | ^ Proposed Kernel Support |||||| | ||
+ | ^ Platform ^ Architecture ^ SLTS v4.4 ^ SLTS v4.4-rt ^ SLTS v4.19 ^ SLTS v4.19-rt ^ SLTS v5.10 ^ SLTS v5.10-rt | | ||
+ | | QEMU | riscv64 | N | N | N | N | Y | T | | ||
+ | | Renesas RZ/Five EVK | riscv64 | N | N | N | N | Y | T | | ||
+ | Notation: Y: Supported, N: Not Supported, T: Not Supported but Testing is done |