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civilinfrastructureplatform:ciptesting:cipreferencehardware:hihope-rzg2m

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civilinfrastructureplatform:ciptesting:cipreferencehardware:hihope-rzg2m [2019/08/27 02:22]
kanechikay Add images of the hihope-rzg2m
civilinfrastructureplatform:ciptesting:cipreferencehardware:hihope-rzg2m [2019/11/05 02:11] (current)
kanechikay Add how to flash the loader and U-Boot to hihope-rzg2m
Line 30: Line 30:
 On the hihope-rzg2m there are three sets of switches - SW1001, SW1002 and SW1003 (BOOT CONFIG SW). On the hihope-rzg2m there are three sets of switches - SW1001, SW1002 and SW1003 (BOOT CONFIG SW).
  
-Default switch ​positions for SPI Flash boot are as follows:+Switch ​positions for SPI Flash boot are as follows:
  
 ^SW Bits^SW1001 ^SW1002 ^SW1003 ^ ^SW Bits^SW1001 ^SW1002 ^SW1003 ^
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 ^7      |ON     ​|ON ​    ​|ON ​    ​| ​ ^7      |ON     ​|ON ​    ​|ON ​    ​| ​
 ^8      |ON     ​|ON ​    ​|ON ​    ​| ​ ^8      |ON     ​|ON ​    ​|ON ​    ​| ​
 +
 +Switch positions for SCIF download are as follows:
 +
 +^SW Bits^SW1001 ^SW1002 ^SW1003 ^
 +^1      |OFF    |ON     ​|OFF ​   |
 +^2      |ON     ​|ON ​    ​|ON ​    |
 +^3      |ON     ​|ON ​    ​|ON ​    |
 +^4      |ON     ​|ON ​    ​|ON ​    |
 +^5      |ON     ​|OFF ​   |ON     |
 +^6      |ON     ​|OFF ​   |ON     |
 +^7      |ON     ​|OFF ​   |ON     |
 +^8      |ON     ​|OFF ​   |ON     |
  
 ==== Connect to the board ==== ==== Connect to the board ====
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 J8 (SATA connector) on the expansion board is not supported on hihope-rzg2m because of RZ/G2M specification. This is reserved for other SoC. J8 (SATA connector) on the expansion board is not supported on hihope-rzg2m because of RZ/G2M specification. This is reserved for other SoC.
  
 +==== Flashing the loader and U-Boot ====
 +If the SPI flash memory on hihope-rzg2m platform is blank, flash the loader and U-Boot.
 +
 +=== Required images ===
 +Following images in S-record format are required. How to build them are [[civilinfrastructureplatform:​ciptesting:​cipreferencehardware:​hihope-rzg2m:​hihope-rzg2mbuildinstructions|here]].
 +  * images
 +    * bootparam_sa0.srec
 +    * bl2-hihope-rzg2m.srec
 +    * cert_header_sa6.srec
 +    * bl31-hihope-rzg2m.srec
 +    * u-boot-elf-hihope-rzg2m.srec
 +  * the RZ/G2 flash writer
 +    * AArch64_Flash_writer_SCIF_DUMMY_CERT_E6300400_hihope.mot
 +
 +=== How to writer the images with the RZ/G2 flash writer ===
 +Set BOOT CONFIG SW (SW1001, SW1002 and SW1003) to SCIF download positions and flip SW2402 (next to DC Jack) to the '​ON'​ position (1-pin side, outside of the board). The following output should be seen on the debug serial console:
 +
 +<​code>​
 +SCIF Download mode (w/o verification)
 +(C) Renesas Electronics Corp.
 +
 +-- Load Program to SystemRAM ---------------
 +please send !
 +</​code>​
 +
 +Transfer S-record file after the log output.
 +
 +S-record file:
 +
 +- AArch64_Flash_writer_SCIF_DUMMY_CERT_E6300400_hihope.mot
 +
 +After the transfer has suceeded, the following log will be shown.
 +
 +<​code>​
 +Flash writer for RZ/G2M V1.00 Sep.24,2018
 +>
 +</​code>​
 +
 +Write the loader and U-Boot images to the SPI flash memroy with following address settings.
 +
 +^ Filename ​                    ^ Program Top Address ^ Flash Save Address ^ Description ​           ^
 +| bootparam_sa0.srec ​          | H'​E6320000 ​         | H'​000000 ​          | Loader(Boot parameter) |
 +| bl2-hihope-rzg2m.srec ​       | H'​E6304000 ​         | H'​040000 ​          | Loader ​                |
 +| cert_header_sa6.srec ​        | H'​E6320000 ​         | H'​180000 ​          | Loader(Certification) ​ |
 +| bl31-hihope-rzg2m.srec ​      | H'​44000000 ​         | H'​1C0000 ​          | ARM Trusted Firmware ​  |
 +| u-boot-elf-hihope-rzg2m.srec | H'​50000000 ​         | H'​300000 ​          | U-boot ​                |
 +
 +Followings are how to write "​bl2-hihope-rzg2m.srec"​ to H'​040000 by XLS2 command. The other images can be written in the same procedure.
 +
 +<​code>​
 +>XLS2
 +===== Qspi writing of RZ/G2 Board Command =============
 +Load Program to Spiflash
 +Writes to any of SPI address.
 + ​Winbond : W25M512JW
 +Program Top Address & Qspi Save Address
 +===== Please Input Program Top Address ============
 +  Please Input : H'
 +</​code>​
 +
 +Please enter the program top address of the write image in hexadecimal.
 +
 +<​code>​
 +>XLS2
 +===== Qspi writing of RZ/G2 Board Command =============
 +Load Program to Spiflash
 +Writes to any of SPI address.
 + ​Winbond : W25M512JW
 +Program Top Address & Qspi Save Address
 +===== Please Input Program Top Address ============
 +  Please Input : H'​e6304000
 +
 +===== Please Input Qspi Save Address ===
 +  Please Input : H'
 +</​code>​
 +
 +Please enter the flash save address in hexadecimal.
 +
 +<​code>​
 +>XLS2
 +===== Qspi writing of RZ/G2 Board Command =============
 +Load Program to Spiflash
 +Writes to any of SPI address.
 + ​Winbond : W25M512JW
 +Program Top Address & Qspi Save Address
 +===== Please Input Program Top Address ============
 +  Please Input : H'​e6304000
 +
 +===== Please Input Qspi Save Address ===
 +  Please Input : H'​40000
 +Work RAM(H'​50000000-H'​53FFFFFF) Clear....
 +please send ! ('​.'​ & CR stop load)
 +</​code>​
 +
 +Please download the write image in S-record format.
 +
 +<​code>​
 +>XLS2
 +===== Qspi writing of RZ/G2 Board Command =============
 +Load Program to Spiflash
 +Writes to any of SPI address.
 + ​Winbond : W25M512JW
 +Program Top Address & Qspi Save Address
 +===== Please Input Program Top Address ============
 +  Please Input : H'​e6304000
 +
 +===== Please Input Qspi Save Address ===
 +  Please Input : H'​40000
 +Work RAM(H'​50000000-H'​53FFFFFF) Clear....
 +please send ! ('​.'​ & CR stop load)
 +SPI Data Clear(H'​FF) Check :​H'​00040000-0005FFFF,​Clear OK?(y/n)
 +</​code>​
 +
 +Please enter the '​y'​ key when asked to clear.
 +
 +If Flash is erased, it will not be asked.
 +
 +<​code>​
 +>XLS2
 +===== Qspi writing of RZ/G2 Board Command =============
 +Load Program to Spiflash
 +Writes to any of SPI address.
 + ​Winbond : W25M512JW
 +Program Top Address & Qspi Save Address
 +===== Please Input Program Top Address ============
 +  Please Input : H'​e6304000
 +
 +===== Please Input Qspi Save Address ===
 +  Please Input : H'​40000
 +Work RAM(H'​50000000-H'​53FFFFFF) Clear....
 +please send ! ('​.'​ & CR stop load)
 +SPI Data Clear(H'​FF) Check :​H'​00040000-0005FFFF Erasing...Erase Completed
 +SAVE SPI-FLASH.......
 +======= Qspi  Save Information ​ =================
 + ​SpiFlashMemory Stat Address : H'​00040000
 + ​SpiFlashMemory End Address ​ : H'​0005B0E3
 +===========================================================
 +
 +>
 +</​code>​
  
 +The new prompt means the image writing has been completed.
  
 ==== Booting the Kernel ==== ==== Booting the Kernel ====
-To boot the board, flip SW2402 (next to DC Jack) to the '​ON'​ position (1-pin side, outside of the board). The following bootloader output should be seen on the debug serial console:+To boot the board, ​set BOOT CONFIG SW (SW1001, SW1002 and SW1003) to SPI flash boot positions and flip SW2402 (next to DC Jack) to the '​ON'​ position (1-pin side, outside of the board). The following bootloader output should be seen on the debug serial console:
  
 <​code>​ <​code>​
civilinfrastructureplatform/ciptesting/cipreferencehardware/hihope-rzg2m.1566872548.txt.gz ยท Last modified: 2019/08/27 02:22 by kanechikay