====== CIP Reference Hardware ======
The CIP project has selected a number of hardware platforms to be used as reference platforms for the project's software.

These platforms will be supported in:
  * [[civilinfrastructureplatform:cipkernelmaintenance|CIP SLTS Linux Kernel]]
  * [[civilinfrastructureplatform:cip-core|CIP Core Reference Filesystem]]
  * [[civilinfrastructureplatform:ciptesting:centalisedtesting|CIP Centralised Testing]]

The current list of reference hardware for the CIP project is:
|                                                                                                             |               ^  Supported Kernels                                                                                              ||||||||
^ Platform                                                                                                    ^ Architecture  ^  SLTS v4.4          ^  SLTS v4.4-rt   ^  SLTS v4.19  ^  SLTS v4.19-rt  ^  SLTS v5.10  ^  SLTS v5.10-rt  ^  STLS v6.1  ^ SLTS v6.1-rt  |
| AM335x Beaglebone Black                                                                                     | Armv7         |  Y                  |  Y<sup>1</sup>  |  Y           |  Y<sup>1</sup>  |  Y                    |  T                  |
| Cyclone V DE0-Nano-SoC Development Kit                                                                      | Armv7         |  N                  |  N              |  Y           |  Y<sup>1</sup>  |  Y                    |  T                  |
| QEMU                                                                                                        | x86_64        |  Y                  |  Y<sup>1</sup>  |  Y           |  Y<sup>1</sup>  |  Y                    |  T                  |  Y  |  Y  |
| :::                                                                                                         | Armv7(virt/cortex-a15)         |  Y                  |  Y<sup>1</sup>  |  Y           |  Y<sup>1</sup>    |  Y                    |  T                  |  Y  |  Y  |
| :::                                                                                                         | Armv8(virt/cortex-a53)         |  Y                  |  Y<sup>1</sup>  |  Y           |  Y<sup>1</sup>    |  Y                    |  T                  |  Y  |  Y  |
| :::                                                                                                         | riscv64       |  N          |  N             |  N           |  N              |  Y           |  N              |  Y  |  N  |
| [[civilinfrastructureplatform:ciptesting:cipreferencehardware:iwg20m|RZ/G1M iWave Qseven Development Kit]]  | Armv7         |  Y                  |  Y<sup>2</sup>  |  Y           |  Y<sup>2</sup>  |  Y                    |  Y                  |
| [[civilinfrastructureplatform:ciptesting:cipreferencehardware:hihope-rzg2m|RZ/G2M HopeRun HiHope]]          | Armv8         |  N                  |  N              |  Y           |  Y<sup>2</sup>  |  Y                    |  Y                  |
| SIMATIC IPC227E                                                                                             | x86-64        |  N                  |  N              |  Y           |  Y<sup>1</sup>  |  Y                    |  Y                  |  Y  |  Y  |
| SIEMENS M-COM                                                                                             | x86-64        |  N                  |  N              |  N           |  N              |  Y                    |  Y                  |  Y  |  Y  |
| OpenBlocks IoT VX2                                                                                          | x86-64        |  N                  |  N              |  Y           |  Y<sup>1</sup>  |  Y                    |  T                  |  Y  |  T  |
| Zynq UltraScale+ MPSoC ZCU102 Evaluation Kit                                                                | Armv8         |  N                  |  N              |  T           |  T<sup>1</sup>  |  Y                    |  Y                  |

Notation: Y: Supported, N: Not Supported, T: Not Supported but Testing is done

<sup>1</sup> Tested with standard Kernel configuration (non-RT)\\ 
<sup>2</sup> Tested with Real-Time enabled Kernel configuration

===== Candidate Reference Hardware =====
The following platforms have been submitted to the CIP TSC for consideration to become an official CIP reference platform:
| | ^  Proposed Kernel Support  ||||||||
^ Platform  ^ Architecture ^  SLTS v4.4  ^  SLTS v4.4-rt  ^  SLTS v4.19  ^  SLTS v4.19-rt  ^  SLTS v5.10  ^  SLTS v5.10-rt  ^  SLTS v6.1  ^  SLTS v6.1-rt  |
| Renesas RZ/Five EVK  |  riscv64  |  N          |  N             |  N           |  N              |  Y           |  T              |  Y           |  T              |

Notation: Y: Supported, N: Not Supported, T: Not Supported but Testing is done